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Analysis of process variations impact on the single-event transient quenching in 65 nm CMOS combinational circuits

Analysis of process variations impact on the single-event transient quenching in 65 nm CMOS combinational circuits

作     者:WANG TianQi XIAO LiYi ZHOU Bin QI ChunHua 

作者机构:Micro-electric CentreHarbin Institute of Technology 

基  金:supported by the Harbin Science and Innovation Research.(Grant No.2012RFXXG042) 

出 版 物:《Science China(Technological Sciences)》 (中国科学(技术科学英文版))

年 卷 期:2014年第57卷第2期

页      码:322-331页

摘      要:Single-event transient pulse quenching (Quenching effect) is employed to effectively mitigate WSET (SET pulse width). It en- hanced along with the increased charge sharing which is norm for future advanced technologies. As technology scales, param- eter variation is another serious issue that significantly affects circuit's performance and single-event response. Monte Carlo simulations combined with TCAD (Technology Computer-Aided Design) simulations are conducted on a six-stage inverter chain to identify and quantify the impact of charge sharing and parameter variation on pulse quenching. Studies show that charge sharing induce a wider WSET spread range. The difference of WSET range between no quenching and quenching is smaller in NMOS (N-Channel Metal-Oxide-Semiconductor Field-Effect Transistor) simulation than that in PMOS' (P-Channel Met- N-Oxide-Semiconductor Field-Effect Transistor), so that from parameter variation view, quenching is beneficial in PMOS SET mitigation. The individual parameter analysis indicates that gate oxide thickness (TOXE) and channel length variation (XL) mostly affect SET response of combinational circuits. They bring 14.58% and 19.73% average WSET difference probabilities for no-quenching cases, and 105.56% and 123.32% for quenching cases.

主 题 词:single-event transient (SET) parameter variation Monte Carlo simulation quenching effect charge share 

学科分类:080903[080903] 0809[工学-计算机类] 08[工学] 

核心收录:

D O I:10.1007/s11431-013-5441-9

馆 藏 号:203116574...

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