A High-Performance Sample-and-Hold Circuit with Sampling Bandwidth Compensation

作     者：罗磊 许俊 任俊彦 Luo Lei;Xu Jun;Ren Junyan

作者机构：复旦大学专用集成电路与系统国家重点实验室上海201203 

出 版 物：《Journal of Semiconductors》 (半导体学报（英文版）)

年 卷 期：2008年第29卷第6期

页      码：1122-1127页

摘      要：A novel charge exchanging compensation （CEC） technique is proposed for a wideband sample-and-hold （S/H） circuit applied in an IF sampling ADC. The CEC technique compensates the sampling bandwidth by eliminating the impact from finite on-resistance of the sampling switch, and avoids increasing clock feedthrough and charge injection. Meanwhile, a low power two stage OTA with a class AB output stage is designed to provide the S/H a 3Vp-p input range under 1.8V power. The S/H achieves a 94dB spurious-free dynamic range for a 200MHz input signal at a 100Ms/s sample rate and consumes only 26mW with a 5.5pF load.

主 题 词：bandwidth sampling switch spurious-free dynamic range two-stage OTA class AB output stage 

学科分类：080902[080902] 0809[工学-计算机类] 08[工学] 

核心收录：

D　O　I：10.3321/j.issn:0253-4177.2008.06.020

馆 藏 号：203133223...