A 1.8V 10bit 100Msps Pipelined Analog to Digital Converter

作     者：龙善丽 时龙兴 吴建辉 王沛 

作者机构：东南大学国家专用集成电路系统工程技术研究中心南京210096 

出 版 物：《Journal of Semiconductors》 (半导体学报（英文版）)

年 卷 期：2008年第29卷第5期

页      码：923-929页

摘      要：A novel low-voltage,low constant-impedance switch is proposed, which not only eliminates the parasitic capacitor but also reduces the variation of switch ＂on＂ resistance. With the gain-boost technology,the operational transconductance amplifier used in this analog-to-digital converter （ADC） achieves enough DC gain and unity-gain frequency under the low voltage supply and to guarantee the performance of the sample and hold circuit （S/H） and the sub-stages. Based on these methods,a 10bit 100Msps pipelined ADC is fabricated in a 0. 18μm CMOS process and operates under a 1.8V voltage supply. The ADC achieves an SNR of 54. 2dB （input frequency of 6.26MHz） and an SNR of 49. 8dB （input frequency of 48. 96MHz） when the sampling frequency is 100MHz.

主 题 词：analog-to-digital converter bootstraooed switch gain-boosting technioue 

学科分类：080902[080902] 0809[工学-计算机类] 08[工学] 

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