200Ms/s 177mW 8bit Folding and Interpolating CMOS A/D Converter

作     者：陈诚 王照钢 任俊彦 许俊 

作者机构：复旦大学专用集成电路与系统国家重点实验室上海200433 

基　　金：国家高技术研究发展计划 (编号 :2 0 0 2 AA1Z13 60 ) 上海市集成电路设计创新 (编号 :0 2 70 62 0 2 4和 0 2 70 62 0 0 5 )资助项目~~ 

出 版 物：《Journal of Semiconductors》 (半导体学报（英文版）)

年 卷 期：2004年第25卷第11期

页      码：1391-1397页

摘      要：A CMOS folding and interpolating analog-to-digital converter (ADC) for embedded application is *** circuit is fully compatible with standard digital CMOS technology.A modified folding block implemented without resistor contributes to a small chip *** the input stage,offset averaging reduces the input capacitance and the distributed track-and-hold circuits are proposed to improve signal-to-noise-plus-distortion *** 200Ms/s 8bit ADC with 177mW total power consumption at 3.3V power supply is realized in standard digital 0.18μm 3.3V CMOS technology.

主 题 词：analog-to-digital converter CMOS analog integrated circuits folding and interpolating 

学科分类：080903[080903] 0809[工学-计算机类] 08[工学] 

核心收录：

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