A novel layout for single event upset mitigation in advanced CMOS SRAM cells

作     者：QIN JunRui LI DaWei CHEN ShuMing 

作者机构：School of Computer ScienceNational University of Defense Technology 

基　　金：supported by the National Natural Science Foundation of China (Grant Nos. 60836004 and 60906014) Hunan Provincial Innovation Foundation For Postgraduate (Grant No. CX2011B026) 

出 版 物：《Science China(Technological Sciences)》 (中国科学（技术科学英文版）)

年 卷 期：2013年第56卷第1期

页      码：143-147页

摘      要：A novel layout has been proposed to reduce the single event upset(SEU) vulnerability of SRAM *** 3-D technology computer-aided design(TCAD) simulation analyses show that the proposed layout can recover the upset-state much easier than conventional layout for larger space of PMOS *** the angle incidence,the proposed layout is immune from ion hit in two plans,and is more robust against SEU in other two plans than the conventional *** ability of anti-SEU is enhanced by at least 33% while the area cost reduced by 47%.Consequently,the layout strategy proposed can gain both reliability and area cost benefit simultaneously.

主 题 词：SRAM单元 单粒子翻转 CMOS 计算机辅助设计 PMOS晶体管 成本效益 SEU 模拟分析 

学科分类：080903[080903] 0810[工学-土木类] 0809[工学-计算机类] 08[工学] 0805[工学-能源动力学] 0702[理学-物理学类] 0812[工学-测绘类] 

核心收录：

D　O　I：10.1007/s11431-012-5049-5

馆 藏 号：203165429...