Design and application of a depletion-mode NJFET in a high-voltage BiCMOS process

作     者：刘勇 唐昭焕 王志宽 杨永晖 杨卫东 胡永贵 

作者机构：Sichuan Institute of Solid-State CircuitsCETC National Laboratory of Analog ICs 

出 版 物：《Journal of Semiconductors》 (半导体学报（英文版）)

年 卷 期：2010年第31卷第8期

页      码：70-73页

摘      要：A novel depletion-mode NJFET compatible high-voltage BiCMOS process is proposed and experimentally demonstrated with a four-branch 12-bit DAC（digital-to-analog converter）.With this process,an NJFET with a pinch-off voltage ofabout-1.5 V and a breakdown voltage of about 16 V,an NLDDMOS（N-type lightly-dosed-drain in MOS） with a turn-on voltage of about 1.0 V and a breakdown voltage of about 35 V,and a Zener diode with a reverse voltage of about 5.6 V were *** results showed that the converter had a reference temperature coefficient of less than±25 ppm/℃,a differential coefficient error of less than±0.3 LSB,and a linear error of less than±0.5 *** depletion-mode NJFET and its compatible process can also be widely used for high-voltage ADCs or DACs.

主 题 词：depletion-mode NJFET high-voltage BiCMOS process ADC DAC temperature coefficient 

学科分类：080903[080903] 0809[工学-计算机类] 08[工学] 

核心收录：

D　O　I：10.1088/1674-4926/31/8/084006

馆 藏 号：203256543...