Three-dimensional global interconnect based on a design window

作     者：钱利波 朱樟明 杨银堂 

作者机构：Microelectronics School Xidian University 

基　　金：supported by the National Natural Science Foundation of China (Grant Nos. 60725415 and 60676009) the Natural Science and Technology Major Project of the Ministry of Science and Technology of China (Grant No. 2009ZX01034-002-001-005) 

出 版 物：《Chinese Physics B》 (中国物理B（英文版）)

年 卷 期：2011年第20卷第10期

页      码：463-468页

摘      要：Based on a stochastic wire length distributed model, the interconnect distribution of a three-dimensional integrated circuit （3D IC） is predicted exactly. Using the results of this model, a global interconnect design window for a giga-scale system-on-chip （SOC） is established by evaluating the constraints of 1） wiring resource, 2） wiring bandwidth, and 3） wiring noise. In comparison to a two-dimensional integrated circuit （2D IC） in a 130-nm and 45-nm technology node, the design window expands for a 3D IC to improve the design reliability and system performance, further supporting 3D IC application in future integrated circuit design.

主 题 词：three-dimensional integrated circuit design window wiring resource bandwidth 

学科分类：080903[080903] 0809[工学-计算机类] 08[工学] 0805[工学-能源动力学] 0704[理学-天文学类] 

核心收录：

D　O　I：10.1088/1674-1056/20/10/108401

馆 藏 号：203334016...