Content Addressable Memory Using Automatic Charge Balancing with Self-Control Mechanism and Master-Slave Match Line Design

作     者：Dr. Deepa Jose P. Suganya Dr. Palanichamy Nirmal Kumar Dr. Deepa Jose;P. Suganya;Dr. Palanichamy Nirmal Kumar

作者机构：Department of ECE KCG College of Technology KCG Nagar Chennai India Department of ECE College of Engineering Guindy Anna University Chennai India 

出 版 物：《Circuits and Systems》 (电路与系统（英文）)

年 卷 期：2016年第7卷第6期

页      码：597-611页

摘      要：Content Addressable Memory (CAM) is a type of memory used for high-speed search applications. Due to parallel comparison feature, the CAM memory leads to large power consumption which is caused by frequent pre-charge or discharge of match line. In this paper, CAM for automatic charge balancing with self-control mechanism is proposed to control the voltage swing of ML for reducing the power consumption of CAM. Another technique to reduce the power dissipation is to use MSML, it combines the master-slave architecture with charge minimization technique. Unlike the conventional design, only one match line (ML) is used, whereas in Master-Slave Match Line (MSML) one master ML and several slave MLs are used to reduce the power dissipation in CAM caused by match lines (MLs). Theoretically, the match line (ML) reduces the power consumption up to 50% which is independent of search and match case. The simulation results using Cadence tool of MSML show the reduced power consumption in CAM and modified CAM cell.

主 题 词：Content Addressable Memory (CAM) Match Line (ML) Master-Slave Match Line (MSML) Charge Balance Translation Look-Aside Buffer (TLAB) 

学科分类：08[工学] 0812[工学-测绘类] 

D　O　I：10.4236/cs.2016.76051

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