Design of Compact Baugh-Wooley Multiplier Using Reversible Logic

作     者：V. Rajmohan O. Uma Maheswari V. Rajmohan;O. Uma Maheswari

作者机构：Department of Electronics and Communication Engineering College of Engineering Chennai India 

出 版 物：《Circuits and Systems》 (电路与系统（英文）)

年 卷 期：2016年第7卷第8期

页      码：1522-1529页

摘      要：In today’s digital era, developing digital circuits is bounded by the research towards investigating various nano devices. This paper provides the design of compact Baugh-Wooley multiplier using reversible logic. Even though various researches have been done for designing reversible multiplier, this work is the first in the literature to use Baugh-Wooley algorithm using reversible logic. In this work, a new 5 × 5 reversible multiplier cell is proposed which will be useful in designing Baugh-Wooley multiplier. The proposed single multiplier cell is able to perform addition of a 1 × 1 product with the sum and carry from the previous cell. This reversible multiplier cell is useful in building up regularity in the array multipliers. The Toffoli gate synthesis of the proposed reversible multiplier cell is also given.

主 题 词：Multiplier Baugh-Wooley Low-Power Reversible Logic Quantum Computer 

学科分类：07[理学] 0701[理学-数学类] 070101[070101] 

D　O　I：10.4236/cs.2016.78133

馆 藏 号：203459308...