Design of Low Power Level Shifter Circuit with Sleep Transistor Using MultiSupply Voltage Scheme

作     者：Raveendran Arun Prasath Parasuraman Ganesh Kumar Raveendran Arun Prasath;Parasuraman Ganesh Kumar

作者机构：Department of ECE Anna University Regional Campus-Madurai Madurai India K.L.N. College of Engineering Pottapalayam Sivagangai India 

出 版 物：《Circuits and Systems》 (电路与系统（英文）)

年 卷 期：2016年第7卷第7期

页      码：1132-1139页

摘      要：New low-power Level Shifter (LS) circuit is designed by using sleep transistor with Multi Threshold CMOS (MTCMOS) technique for robust logic voltage shifting from sub-threshold to above- threshold domain. MultiSupply Voltage Design (MSVD) technique is mainly used for energy and speed in modern system-on-chip. In MSVD, level shifters are required to allow different voltage supply to shift from the lower power supply voltage to the higher power supply voltage. This new low-power level shifter circuit is also used for fast response and low leakage power consumption. This low leakage power consumption can be achieved through insertion of sleep transistor and proper transistors sizing. The proposed design efficiently converts 100 mv input signal into 1 v output signal and achieves the power of 2.56 nW by using 90 nm technology.

主 题 词：Level shifter (LS) MultiSupply Voltage Design (MSVD) Subthreshold operation Ultralow Power 

学科分类：080903[080903] 0809[工学-计算机类] 08[工学] 080501[080501] 0805[工学-能源动力学] 080502[080502] 

D　O　I：10.4236/cs.2016.77097

馆 藏 号：203459329...