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Design of Low Power CMOS LNA with Current-Reused and Notch Filter Topology for DS-UWB Application

Design of Low Power CMOS LNA with Current-Reused and Notch Filter Topology for DS-UWB Application

作     者:Meng-Ting Hsu Jhih-Huei Du Wen-Chen Chiu 

作者机构:Microwave Communication and Radio Frequency Integrated Circuit Lab. Department and Institute of Electronic Engineering National Yunlin University of Science and Technology Yunlin Taiwan Chinese Taipei. 

出 版 物:《Wireless Engineering and Technology》 (无线工程与技术(英文))

年 卷 期:2012年第3卷第3期

页      码:167-174页

摘      要:This paper presents the design of a low power LNA with second stage that uses a notch filter for DS-UWB application. The LNA employs a current reuse structure to reduce the power consumption and an active second order notch filter to produce band rejection in the 5 - 6 GHz frequency band. The input reflection coefficient S11 and output reflection S22 are both less than –10 dB. The maximum power gain S21 is 15 dB while the maximum rejection ratio is over –10 dB at 4.8 GHz. The minimum noise figure is 5 dB. The input referred third-order intercept point (IIP3) is –7 dBm at 6 GHz. The power consumption is 6.4 mW from a 1-V power supply.

主 题 词:Low Noise Amplifier (LNA) Low Power Low Voltage Ultra-Wideband (UWB) Active Notch Filter 

学科分类:080902[080902] 0809[工学-计算机类] 08[工学] 

D O I:10.4236/wet.2012.33024

馆 藏 号:203704449...

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