Thermal resistance matrix representation of thermal effects and thermal design of microwave power HBTs with two-dimensional array layout

作     者：Rui Chen Dong-Yue Jin Wan-Rong Zhang Li-Fan Wang Bin Guo Hu Chen Ling-Han Yin Xiao-Xue Jia 陈蕊;金冬月;张万荣;王利凡;郭斌;陈虎;殷凌寒;贾晓雪

作者机构：Faculty of Information Technology Beijing University of Technology 

基　　金：Project supported by the National Natural Science Foundation of China(Grant Nos.61006059 and 61774012) Beijing Municipal Natural Science Foundation,China(Grant No.4143059) Beijing Municipal Education Committee,China(Grant No.KM201710005027) Postdoctoral Science Foundation of Beijing,China(Grant No.2015ZZ-11) China Postdoctoral Science Foundation(Grant No.2015M580951) Scientific Research Foundation Project of Beijing Future Chip Technology Innovation Center,China(Grant No.KYJJ2016008) 

出 版 物：《Chinese Physics B》 (中国物理B（英文版）)

年 卷 期：2019年第28卷第9期

页      码：373-380页

摘      要：Based on the thermal network of the two-dimensional heterojunction bipolar transistors(HBTs) array, the thermal resistance matrix is presented, including the self-heating thermal resistance and thermal coupling resistance to describe the self-heating and thermal coupling effects, *** HBT cells along the emitter length direction, the thermal coupling resistance is far smaller than the self-heating thermal resistance, and the peak junction temperature is mainly determined by the self-heating thermal ***, the thermal coupling resistance is in the same order with the self-heating thermal resistance for HBT cells along the emitter width ***, the dependence of the thermal resistance matrix on cell spacing along the emitter length direction and cell spacing along the emitter width direction is also investigated, *** is shown that the moderate increase of cell spacings along the emitter length direction and the emitter width direction could effectively lower the self-heating thermal resistance and thermal coupling resistance,and hence the peak junction temperature is decreased, which sheds light on adopting a two-dimensional non-uniform cell spacing layout to improve the uneven temperature *** taking a 2 × 6 HBTs array for example, a twodimensional non-uniform cell spacing layout is designed, which can effectively lower the peak junction temperature and reduce the non-uniformity of the dissipated *** the HBTs array with optimized layout, the high power-handling capability and thermal dissipation capability are kept when the bias voltage increases.

主 题 词：heterojunction bipolar transistors(HBTs) array thermal effects thermal resistance matrix thermal design 

学科分类：07[理学] 0702[理学-物理学类] 

核心收录：

D　O　I：10.1088/1674-1056/ab3436

馆 藏 号：203781330...