A Novel Verification Development Platform for Passive UHF RFID Tag

作     者：陈力颖 侯春萍 毛陆虹 吴顺华 徐振梅 王振兴 Chen Liying;Hou Chunping;Mao Luhong;Wu Shunhua;Xu Zhenmei;Wang Zhenxing

作者机构：天津大学电子信息工程学院天津300072 

基　　金：国家高技术研究发展计划资助项目(批准号:2006AA04A109)~~ 

出 版 物：《Journal of Semiconductors》 (半导体学报（英文版）)

年 卷 期：2007年第28卷第11期

页      码：1696-1700页

摘      要：This paper introduces a novel verification development platform for the passive UHF RFID tag,which is compatible with the ISO/IEC 18000-6B standard,operating in the 915MHz ISM band. This platform efficiently reduces the design and development time and cost, and implements a fast prototype design of the passive UHF RFID tag. It includes the RFID analog front end and the tag control logic, which is implemented in an Altera ACEX FPGA. The RFID analog front end, which is fabricated using a Chartered 0.35μm two-poly four-metal CMOS process, contains a local oscillator, power on reset circuit, matching network and backscatter, rectifier, regu- lator,AM demodulator, etc. The platform achieves rapid, flexible and efficient verification and development, and can also be fit for other RFID standards after changing the tag control logic in FPGA.

主 题 词：verification development platform passive UHF RFID tag FPGA 

学科分类：080903[080903] 0809[工学-计算机类] 08[工学] 

核心收录：

D　O　I：10.3969/j.issn.1674-4926.2007.11.006

馆 藏 号：203809417...