Robustness aware high performance high fan-in domino OR logic design

作     者：宫娜 汪金辉 郭宝增 王永清 曹晓兵 田秀丽 

作者机构：College of Electronic and Informational Engineering Hebei University VLSI & System Laboratory Beijing University of Technology 

基　　金：supported by the 2008 Scienceand Research Foundation of Hebei Education Department (No.2008308) 

出 版 物：《Journal of Semiconductors》 (半导体学报（英文版）)

年 卷 期：2009年第30卷第6期

页      码：107-110页

摘      要：A novel technique using a keeper with a simultaneous low supply voltage and low body voltage is proposed to improve the overall performance of high fan-in OR gates without modifying the physical dimensions of the *** results of a 16-input domino OR gate using 45 nm CMOS technology show that the proposed technique could trade off between a high power/speed efficient operation and the robustness to noise ***,a Monte Carlo analysis indicates that the proposed domino OR gate is more robust to parameter variation compared to a conventional domino OR gate.

主 题 词：Domino OR robustness power consumption parameter variation 

学科分类：080903[080903] 0809[工学-计算机类] 08[工学] 

核心收录：

D　O　I：10.1088/1674-4926/30/6/065005

馆 藏 号：203878617...