Design of high efficiency dual-mode buck DC-DC converter

作     者：来新泉 曾华丽 叶强 何惠森 张莎莎 孙煜晴 

作者机构：Institute of Electronic CADXidian University Key Laboratory of High-Speed Circuit Design and EMCMinistry of EducationXidian University 

基　　金：Project supported by the National Natural Science Foundation of China(No.60876023) 

出 版 物：《Journal of Semiconductors》 (半导体学报（英文版）)

年 卷 期：2010年第31卷第11期

页      码：88-92页

摘      要：A buck DC-DC switching regulator with high efficiency is implemented by automatically altering the modulation mode according to load current,and it can operate with an input range of 4.5 to 30 *** light load current,the converter operates in skip *** converter enters PWM mode operation with increasing load *** reduces the switching loss at light load and standby state,which results in prolonging battery lifetime and stand-by ***, externally adjustable soft-start minimizes the inrush supply current and avoids the overshoot of output voltage at initial *** regulator is fabricated by a 0.6μm CDMOS *** test results show that,under the condition of 3.3 V output,the efficiency is up to 64%at 5 mA and the maximum efficiency is 95.5%.

主 题 词：high efficiency soft-start skip mode PWM mode 

学科分类：080801[080801] 0808[工学-自动化类] 08[工学] 

核心收录：

D　O　I：http://iopscience.iop.org/1674-4926/31/11/115005/pdf/1674-4926_31_11_115005.pdf

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