Structure design and film process optimization for metal-gate stress in 20 nm nMOS devices

作     者：付作振 殷华湘 马小龙 柴淑敏 高建峰 陈大鹏 

作者机构：Key Laboratory of Microelectronics Devices and Integrated TechnologyInstitute of MicroelectronicsChinese Academy of Sciences 

基　　金：supported by the Ministry of Science and Technology of China(No.2009ZX02035) 

出 版 物：《Journal of Semiconductors》 (半导体学报（英文版）)

年 卷 期：2013年第34卷第6期

页      码：165-169页

摘      要：The optimizations to metal gate structure and film process were extensively investigated for great metalgate stress（MGS） in 20 nm high-k/metal-gate-last（HKVMG-last） nMOS *** characteristics of advanced MGS technologies on device performances were studied through a process and device simulation by TCAD tools. The metal gate electrode with different stress values（0 to—6 GPa） was implemented in the device simulation along with other traditional process-induced-strain（PIS） technologies like e-SiC and nitride capping *** MGS demonstrated a great enhancing effect on channel carriers transporting in the device as device pitch scaling *** addition,the novel structure for a tilted gate electrode was proposed and relationships between the tilt angle and channel stress were *** with a new method of fully stressed replacement metal gate（FSRMG） and using plane-shape-HfO to substitute U-shape-HfO,the effect of MGS was *** greater film stress in the metal gate,the process conditions for physical vapor deposition（PVD） TiN-x- were *** maximum compressive stress of—6.5 GPa TiN_x was achieved with thinner film and greater RF power as well as about 6 sccm N ratio.

主 题 词：metal gate stress 20 nm CMOS devices high-k/metal gate PVD TiN_x 

学科分类：080903[080903] 0809[工学-计算机类] 08[工学] 080501[080501] 0805[工学-能源动力学] 080502[080502] 

核心收录：

D　O　I：10.1088/1674-4926/34/6/066002

馆 藏 号：203965671...