摘要：随着高压大功率双极功率集成电路在各种电源管理、功率驱动等领域中的应用日益广泛,产品的可靠性设计和控制显得尤其重要。介绍了高压大功率器件小电流的控制研究,说明了小电流形成的原理,及其对产品可靠性的影响;对各类曲线进行了详细分析,阐明了小电流的测试和控制技术,以及小电流对高压大功率双极型集成电路可靠性的重要性。

摘要：介绍了几种互补双极工艺的结构和特点,详细阐述了一种基于N型外延的PN结隔离互补双极工艺;着重探讨了隔离制作技术和PNP管设计要点,并对实际流片结果进行了讨论。

摘要：本文介绍了一种基于PJFET技术的电压基准源设计方法。该方法利用PJFET夹断电压的温度特性产生负温漂电压,在此基础上叠加一个正温漂电压进行温度补偿,产生低温漂基准电压。根据文中的理论方法,基于1.5μm 32 V双极工艺设计了一款输出5 V的电压基准源。测试结果表明,该电压基准源温漂在5 ppm/℃以内,具有低噪声,低温漂等特性。

摘要：With Shockley＇s approximate-channel theory and TCAD tools, a high-voltage, ultra-shallow junction PJFET for the input stage of an integrated operational amplifier （OPA） was realized. The high-performance PJFET device was developed in the Bi-FET process technology. The measured specifications are as follows. The top-gate junction depth is about 0.1 μm, the gate-leakage current is less than 5 pA, the breakdown voltage is more than 80 V, and the pinch-off voltage is optional between 0.8 and 2.0 V. The device and its Bi-FET process technology were used to design and process a high input-impedance integrated OPA. The measured results show that the OPA has a bias current of less than 50 pA, voltage noise of less than 50 nV/Hz^1/2, and current noise of less than 0.05 pA/Hz^1/2.

摘要：兼顾纵向PNP晶体管高电流增益和高击穿特性,设计了一种基于绝缘体上硅(SOI)全介质隔离的P外延互补双极工艺,通过优化纵向PNP晶体管的基区掺杂浓度和有效基区宽度,获得一种高电流增益的纵向PNP晶体管,器件增益β≥500,耐压大于等于30 V。