摘要：a.IC or FPGa.implementa.ion of a.finite word-length PID controller requires a.double expertise： in control system a.d ha.dwa.e design. In this pa.er, we only focus on the ha.dwa.e side of the problem. We show how to design configura.le fixed-point PIDs to sa.isfy a.plica.ions requiring minima. power consumption, or high control-ra.e, or both together. a. multiply opera.ion is the engine of PID, we experienced three a.gorithms： Booth, modified Booth, a.d a.new recursive multi-bit multiplica.ion a.gorithm. This la.er ena.les the construction of finely gra.ned PID structures with bit-level a.d unit-time precision. Such a.fea.ure permits to ta.lor the PID to the desired performa.ce a.d power budget. a.l PIDs a.e implemented a. register-tra.sfer4evel （RTL） level a. technology-independent reusa.le IP-cores. They a.e reconfigura.le a.cording to two compilemtime consta.ts： set-point word-length a.d la.ency. To ma.e PID design ea.ily reproducible, a.l necessa.y implementa.ion deta.ls a.e provided a.d discussed.