摘要：We studied the architecture of embedded computing systems from the viewpoint of power consumption in memory systems and used a selective-code-compression (SCC) approach to realize our *** on the LZW (Lempel-Ziv-Welch) compression algorithm,we propose a novel cost effective compression and decompression *** goal of our study was to develop a new SCC approach with an extended decision policy based on the prediction of power *** decompression method had to be easily implemented in hardware and to collaborate with the embedded *** hardware implementation of our decompression engine uses the TSMC 0.18μm-2p6m model and its cell-based *** calculate power consumption more accurately,we used a static analysis method to estimate the power overhead of the decompression *** also used variable sized branch blocks and considered several features of very long instruction word (VLIW) processors for our compression,including the instruction level parallelism (ILP) technique and the scheduling of *** code-compression methods are not limited to VLIW machines,and can be applied to other kinds of reduced instruction set computer (RISC) architecture.