摘要：Traditional CMOS technology faces some fundamental physical limitations. Therefore, it has become very important for the integrated circuit industry to continue to develop modem devices and new design methods. The threshold logic gate has attracted much attention because of its powerful logic function. The resonant tunneling diode （RTD） is well suited for imple- menting the threshold logic gate because of its high-speed switching capability, negative differential resistance （NDR） charac- teristic, and functional versatility. In this paper, based on the Reed-Muller （RM） algebraic system, a novel method is proposed to convert three-variable non-threshold functions to the XOR of multiple threshold functions, which is simple and has a program- mable implementation. With this approach, all three-variable non-threshold functions can be presented by the XOR of two threshold functions, except for two special functions. On this basis, a novel three-variable universal logic gate （ULG3） is proposed, composed of two RTD-based universal threshold logic gates （UTLG） and an RTD-based three-variable XOR gate （XOR3）. The ULG3 has a simple structure, and a simple method is presented to implement all three-variable functions using one ULG3. Thus, the proposed ULG3 provides a new efficient universal logic gate to implement RTD-based arbitrary n-variable functions.

摘要：An addition is a fundamental arithmetic operation which is used extensively in many very large-scale integration (VLSI) systems such as application-specific digital signal processing (DSP) and *** adder determines the overall performance of the circuits in most of those *** this paper we propose a novel 1-bit full adder cell which uses only eight *** this design,three multiplexers and one inverter are applied tominimize the transistor count and reduce power *** power dissipation,propagation delay,and power-delay produced using the new design are analyzed and com-pared with those of other designs using HSPICE *** results show that the proposed adder has both lower power consumption and a lower power-delay product (PDP) *** low power and low transistor count make the novel 8T full adder cell a candidate for power-efficient applications.

摘要：针对民航四型机场建设及核心控制系统国产自主可控需求,提出了一种国产航站楼建筑设备监控系统(BAS)。首先,对国内外主流BAS架构进行了调研,完成了国产自主可控系统研制。系统控制层网络支持以太网、现场总线灵活组网。然后,开展了航站楼内各类机电设备监控功能设计,提出了航站楼机电设备时间表控制功能的实现方式,可自动实现设备的批量自启停控制。最后,为实现空调集群节能控制,提出了登机桥混合通风及旅客到达流线空调机组的航班联动控制策略。该系统在某大型机场扩建工程成功应用,在保证旅客舒适度的基础上,可有效提高航站楼智能化水平,降低系统运行成本与运维工作量。该系统可进一步推广应用到地铁、高铁等交通场站。

摘要：根据BiCMOS电路的工作特点,提出三值BiCMOS电路的一般结构.应用传输电压开关理论,从开关级设计PNP-NPN-NPN型三值BiCMOS通用驱动电路,并运用此电路设计三值BiCMOS反相器电路.测量和模拟结果表明,所设计的电路具有理想的逻辑功能,电路结构简单,功耗小.该通用驱动电路结构可以应用于任何三值BiCMOS电路的设计中,设计方法简单可行.采用相同的设计思路还可以实现其他NPN和PNP组合的通用驱动电路,进而实现任意三值BiCMOS电路的设计.

摘要：阈值逻辑门由于具有强大的逻辑功能且独自构成完备集而备受关注。为了设计以阈值逻辑门为单元结构的电路,该文首先分析了谱技术与阈值函数的关系,并通过零次、一次谱系数计算阈值函数的权值和阈值。对于非阈值函数,该文提出了新的逻辑函数综合算法,可以将任意非阈值函数转化为几个阈值函数和的形式。因此,使用一个或多个阈值逻辑门组成的网络可以实现任意布尔逻辑函数。该算法为共振隧穿二极管的电路设计提供一种新方法。

摘要：分析了多阈值神经元工作原理,并提出设计多阈值神经元电路的方法.首先,用两个 MOS晶体管组成电压型突触电路,然后又提出一种基于BiCMOS工艺的判别转换开关电路,这种电路以压控电流作为阈值信号,并实现电压到电流的转换.在此基础上,结合限幅电压开关理论提出多阈值神经元阈值判别函数电路的开关级设计方法.最后,从开关级设计了实现三值逻辑中文字、与、或三种基本运算的多阈值神经元电路,用这三种基本运算的多阈值神经元电路可实现任意三值函数的多阈值神经网络.文章还对设计出的电路用 PSPICE进行模拟,测量相关参数.模拟结果表明,该文设计的电路不仅实现了正确的逻辑功能,而且速度较快.

摘要：A three-dimensional diesel particulate filter(DPF)simulation model was developed by using AVL software FIRE to study the effects of four factors on soot particle distributions along the axial and radial directions in the DPF after the model accuracy was *** orthogonal test method was used to determine the importance and weights of the design of experiments(DoE)factors such as the expanding angle,the number of channels per square inch,and the exhaust mass flow *** effects of these factors on the uniformity of the soot particle distributions were also *** results show that when the soot loading time was 400 s,the soot particles inside the DPF along the axial direction exhibited a bowl shape,which was high on the both ends and low in the *** uniformity of the axial distribution of soot particles reduces significantly with an increase in the number of channels per square *** uniformity of the radial distribution reduced with an increase in the expanding angle of the divergent *** on the impacts on the axial uniformity,the three most influencing factors in a descending order are the number of channels per square inch,the exhaust mass flow rate,and the expanding angle of the divergent tube.

摘要：负阻器件由于在电流-电压特性曲线中表现出独特的负微分电阻特性,从而大大增加了单个器件所能实现的逻辑功能.如果将其用于数字逻辑电路设计,尤其是触发器的设计,可有效减少器件的数目.通过分析CMOS工艺负阻器件MOS-NDR及单双稳态转换逻辑单元MOBILE的工作特性,设计了一个时钟上升沿触发的D触发器.采用TSMC 0.18μm工艺对所设计的电路进行HSPICE仿真,仿真结果表明所设计的电路具有正确的逻辑功能.与基于MOS-NDR负阻器件的同类触发器相比,新设计的D触发器具有更稳健的输出和较强的抗干扰能力.

摘要：分析硬限幅多阈值神经元的工作原理,提出了运用多阈值神经元设计D触发器的方法.首先,用单个多阈值神经元设计锁存器;其次,利用两个锁存器设计了一次操作的主从型D触发器.本文设计的基于多阈值神经元的触发器与传统基于单阈值神经元的触发器相比减少了神经元的数量和连接数目、降低了复杂度、提高了稳定性.运用本文提出的多阈值神经元触发器,可以设计任意功能的神经网络时序电路.

摘要：通过分析现有基于二值时钟的二值双边沿触发器的设计思想,设计了基于二值时钟的三值双边沿触发器.进一步利用多值时钟的多个跳变沿设计了基于三值时钟的三值双边沿触发器,充分利用了多值信号携带信息量大的优点,设计的三值双边沿触发器结构简单.模拟结果表明,设计的三值双边沿触发器具有正确的逻辑功能,并可以大幅降低功耗.