摘要：In today’s digital era, dev.loping digital circuits is bounded by the research towards inv.stigating v.rious nano dev.ces. This paper prov.des the design of compact Baugh-Wooley multiplier using rev.rsible logic. Ev.n though v.rious researches hav. been done for designing rev.rsible multiplier, this work is the first in the literature to use Baugh-Wooley algorithm using rev.rsible logic. In this work, a new 5 × 5 rev.rsible multiplier cell is proposed which will be useful in designing Baugh-Wooley multiplier. The proposed single multiplier cell is able to perform addition of a 1 × 1 product with the sum and carry from the prev.ous cell. This rev.rsible multiplier cell is useful in building up regularity in the array multipliers. The Toffoli gate synthesis of the proposed rev.rsible multiplier cell is also giv.n.