摘要：A novel design of multiplex differential voltage comparators(MDVC) is presented for reducing current and power dissipation. According to the special properties of relational operation and logical operation, parts of the comparators are redundant in some instances, and thus can be turned off. By selecting and switching the current routes, several effective differential pairs are biased by a single tail current stage-by-stage and the redundant comparators are turned off by cutting their tail currents. As a result, the quiescent current and power consumption are greatly decreased. The switching of current is achieved by the input differential pair transistors themselves and hence no extra switches are required. When a MDVC is used in a flash analog-to-digital converter(ADC), its current dissipation is much lower than that of the conventional comparators. This architecture can also be used in window-comparators, maximum or minimum comparators, and comparators for logical operations. The power dissipation in all these cases could be reduced significantly.

摘要：典型的集成Buck型DC-DC变换器,其电感只有一端接入芯片,无法在芯片内部采用Boost型DC-DC在电感两端直接并联电阻的方法进行振铃的快速衰减.文中设计了一种新颖的适用于Buck型DC-DC的抗振铃电路,在芯片内部采用一个线性时变电阻网络将电感的一端与芯片的电源(或地)之间进行连接.进行振铃衰减时,起初电阻较小,振铃衰减很快,但直流电流较大;随着振铃的减弱,逐渐增大电阻以减小直流电流,当振铃结束且直流电流很小时完全断开电阻.这样既达到抗振铃的目的,又不会引起持续的直流放电.采用此电路的一款DC-DC已在韩国Hy-nix公司的0.5μm CMOS工艺线投片,测试结果证明抗振铃效果良好.