摘要：The impact of the three state-of-the-art germanium（Ge） profiles（box,trapezoid and triangular） across the base of SiGe heterojunction bipolar transistors（HBTs） under the condition of the same total amount of Ge on the temperature dependence of current gainβand cut-off frequency f_T,as well as the temperature profile,are *** can be found that although theβof HBT with a box Ge profile is larger than that of the others,it decreases the fastest as the temperature increases,while theβof HBT with a triangular Ge profile is smaller than that of the others,but decreases the slowest as the temperature *** the other hand,the f_T of HBT with a trapezoid Ge profile is larger than that of the others,but decreases the fastest as the temperature increases,and the f_T of HBT with a box Ge profile is smaller than that of the others,but decreases the slowest as temperature ***,the peak and surface temperature difference between the emitter fingers of the HBT with a triangular Ge profile is higher than that of the *** on these results,a novel segmented step box Ge profile is proposed,which has modestβand f_T,and trades off the temperature sensitivity of current gain and cut-off frequency,and the temperature profile of the device.

摘要：设计了一款具有电阻反馈的新型超宽带（UWB）SiGe HBT低噪声放大器（LNA）。因为摒弃了使用占片面积大的电感，所以极大节省了放大器的芯片面积和制作成本。在新型放大器的反馈支路中，使用了复合分布式电阻和隔直流电容，代替了传统的单一电阻。用这种方式设计的LNA，仅通过调整与电容串联的电阻就可以极大地改善放大器的端口匹配，同时不牺牲偏置。最终设计出的LNA版图面积仅为0．144mm^2。仿真实验显示，在3．1—10GHz超宽频带内，新型UWB LNA实现了低于4．5dB的噪声系数、高达20dB的增益（增益平坦度仅为1．032dB），小于1．637的输出端驻波比，大于2．3的稳定因子。此研究成果对设计开发低成本、高性能的单片UWB LNA具有重要指导意义。

摘要：详细地分析了Cascode结构的线性度和3dB带宽，利用Cascode结构的高线性度和Darlington结构的高增益的优点构成了Darlington—Cascode结构，在此基础上，基于台积电TSMC0．35μm SiGe工艺，设计了一款芯片面积小的满足超宽带（UWB）标准的无电感SiGe异质结双晶体管（HBT）低噪声放大器（LNA）。该放大器利用电阻反馈结构替代了电感-电容（LC）匹配网络结构，实现了输入、输出阻抗匹配，未采用无源电感，节省了芯片面积，芯片面积仅为0．046mm2，并将Darlington—Cascode结构作为LNA的输出级，既提高了增益，又提高了线性度。LNA版图仿真结果表明，在UWB频带范围内，LNA的增益为19．5～20dB，增益平坦度为4-0．25dB；输入、输出匹配良好；线性度为-5- -2dBm；在整个频段内，无条件稳定。

摘要：With the aid of a thermal-electrical model, a practical method for designing multi-finger power heterojunction bipolar transistors with finger lengths divided in groups is proposed. The method can effectively enhance the thermal stability of the devices without sacrificing the design time. Taking a 40-finger heterojunction bipolar transistor for example, the device with non-uniform emitter finger lengths is optimized and fabricated. Both the theoretical and the experimental results show that, for the optimum device, the peak temperature is lowered by 26.19 K and the maximum temperature difference is reduced by 56.67% when compared with the conventional heterojunction bipolar transistor with uniform emitter finger length. Furthermore, the ability to improve the uniformity of the temperature profile and to expand the thermal stable operation range is strengthened as the power level increases, which is ascribed to the improvement of the thermal resistance in the optimum device. A detailed design procedure is also summarized to provide a general guide for designing power heterojunction bipolar transistors with non-uniform finger lengths.

摘要：The thermal resistance matrix including self-heating thermal resistance and thermal coupling resistance is presented to describe the thermal effects of multi-finger power heterojunction bipolar transistors. The dependence of thermal resistance matrix on finger spacing is also investigated. It is shown that both self-heating thermal resistance and thermal coupling resistance are lowered by increasing the finger spacing, in which the downward dissipated heat path is widened and the heat flow from adjacent fingers is effectively suppressed. The decrease of self-heating thermal resistance and thermal coupling resistance is helpful for improving the thermal stability of power devices. Furthermore, with the aid of the thermal resistance matrix a 10-finger power heterojunction bipolar transistor （HBT） with non-uniform finger spacing is designed for high thermal stability. The optimized structure can effectively lower the peak temperature while maintaining a uniformity of the temperature profile at various biases and thus the device effectively may operate at a higher power level.

摘要：设计了一款采用可调谐有源电感(TAI)的可调增益的小面积超宽带低噪声放大器(LNA),输入级采用共基极结构,输出级采用射随器结构,分别实现了宽带输入和输出匹配;放大级采用带有反馈电阻的共射共基结构以取得宽的带宽,并采用TAI作负载,通过调节TAI的多个外部偏压使LNA的增益可调。结果表明,该LNA在2 GHz^9 GHz的频带内,通过组合调节有源电感调节端口的偏压可实现S21在16.5 d B^21.1 d B的连续可调;S_(11)小于-14.7 d B;S_(22)小于-19.3 d B;NF小于4.9 d B;芯片面积仅为0.049 mm^2。

摘要：设计了一款无螺旋电感的1~6 GHz频段的小面积高性能SiGe HBT宽带低噪声放大器(wideband low noise amplifier,WLNA).采用具有优良阻抗匹配特性的共基放大器作为输入级,并采用噪声抵消技术抵消其噪声达到输入噪声匹配;共射放大器作为输出级,有源电感替代螺旋电感实现电感峰化技术来扩展频带宽度、提高增益的平坦度.基于Jazz 0.35μm SiGe BiCMOS工艺,完成了版图设计,WLNA的版图尺寸仅为105μm×115μm,与使用螺旋电感的WLNA相比,芯片面积大大减小.利用安捷伦公司的射频/微波集成电路仿真工具ADS进行了验证.结果表明:该WLNA在1~6 GHz频段内,S21>16 dB,NF<3.5 dB,S11<-10 dB,S22<-10 dB.对于设计应用于射频前端的小面积、低成本、高性能的单片WLNA具有一定的指导意义.

摘要：采用低噪声有源电感,设计了一种增益可调节的MB-LPC-LNA。在输入级,采用带有噪声抵消支路的有源电感,实现了不同频率下输入阻抗匹配与输入噪声的匹配;放大级采用共射共基-共射电流复用结构,实现了低功耗;在输出端使用了一个电阻负载,实现了输出阻抗匹配。基于Jazz 0.35μm SiGe BiCMOS工艺库,采用射频集成电路设计工具ADS,对该MB-LPC-LNA的性能进行验证。结果表明,在3.6 GHz和5.6 GHz两个频带下,该LNA的输入输出匹配良好,输入回波损耗分别为-21.9 dB和-21.7 dB,输出回波损耗分别为-23.5 dB和-16.0 dB;反向隔离度良好,均小于-80 dB;噪声性能良好,噪声系数分别为4.33 dB和4.51 dB;电压放大性能良好,增益分别为23.7 dB和23.9 dB;功耗较低,分别为14.9 mW和15.4 mW;线性度良好,IIP3和OIP3分别为-9 dBm和13 dBm。

摘要：射频可变增益放大器大多基于CMOS工艺和砷化镓工艺,通过改变晶体管的偏置电压或建立衰减器增益控制结构实现增益可调.本文采用高性能的射频锗硅异质结双极晶体管,设计并制作了一款射频可变增益放大器.放大器的增益可控性通过改变负反馈支路中PIN二极管的正向偏压来实现.基于带有PIN二极管反馈的可变增益放大器的高频小信号等效电路,本文详细分析了增益可控机制,设计并制作完成了1.8GHz的可变增益放大器.测试结果表明在频率为1.8GHz时,控制电压从0.6V到3.0V的变化范围内,增益可调范围达到15d B;噪声系数低于5.5d B,最小噪声系数达到2.6d B.整个控制电压变化范围内输入输出匹配均保持良好,线性度也在可接受范围内.

摘要：基于器件仿真器Atlas,建立了InP/InGaAsP单向载流子传输的双异质结光敏晶体管(UTC-DHPT)的二维模型,分析讨论了器件性能与外延结构参数的关系.设计出同时具有高响应度(17.93 A/W)和高特征频率(121.68GHz)的UTC-DHPT,缓解了传统的异质结光敏晶体管光电探测器中探测效率和工作速度的矛盾.