摘要：Tungsten is a promising candidate for plasma-facing materials to cover the surface of the divertor plate in the design of an international thermonuclear experimental reactor （ITER）. Copper as a heat sink material serves to transfer heat excellently. Divertor mock-ups with W/Cu graded interlayers were designed to reduce thermal stresses. Thermally induced stresses and temperature in a W/Cu divertor mock-up were analyzed using the finite element method. The graded structures with different exponents p and thick- nesses were designed and discussed. The conclusions drawn from these analyses are that thermal stresses reach the minimum and the temperature is suitable when exponent p is 1.5 and the thickness of five graded interlayers is 5 mm.

摘要：Ongoing research is described that is focused upon modelling the space base information network and simulating its behaviours： simulation of spaced based communications and networking project. Its objective is to demonstrate the feasibility of producing a tool that can provide a performance evaluation of various eonstellation access techniques and routing policies. The architecture and design of the simulation system are explored. The algorithm of data routing and instrument scheduling in this project is described. Besides these, the key methodologies of simulating the inter-satellite link features in the data transmissions are also discussed. The performance of both instrument scheduling algorithm and routing schemes is evaluated and analyzed through extensive simulations under a typical scenario.

摘要：The shrinking of cell-size brings significant changes to the wireless uplink of densely small cells （DSCs）. A codebook design is proposed that utilizes the strong line of sight （LOS） chan- nel component existing in a DSC system for uplink of the DSC system. To further improve the uplink performance, the high-rank codebook is designed based on singular value decomposition （SVD） due to the unnecessary preservation of strict constant modulus in the DSC system. And according to the simulation result, the proposed codebook leads to significant sum-rate gain and appreciable block error rate （BLER） performance improvement in the DSC system.

摘要：Fibre channel storage area networks (FC-SAN) are effective solutions to address storage man- agement problems caused by very large volumes of data. But the expense of fibre channel devices limits FC-SAN applications. The use of IP networks instead of fibre channel networks will reduce SAN cost, but will also reduce the performance. Therefore, small computer system interface (SCSI) devices were consid- ered to replace FC disks to reduce the SAN cost. A driver for the FC network adapter and the FC target, de- signed and implemented to support this structure, obeys the SCSI protocol and works in target mode with 200 MB/s bandwidth. The FC target architecture and implementation were compared with the FC initiator. The SCSI command transfer process in the FC layer was described. The performance test results show that the maximum I/O throughput reachs 167 MB/s for read requests and 196 MB/s for write requests (FC band- width is 200 MB/s), verifying that the FC target is very efficient. The modularization, efficiency, and low cost of the FC target will enable SAN and fibre channel to be more widely used in applications.

摘要：A SCSI target emulator is used in a storage area network （SAN） environment to simulate the behavior of a SCSI target for processing and responding to I/O requests issued by initiators. The SCSI target emulator works with general storage devices with multiple transport protocols. The target emulator utilizes a protocol conversion module that translates the SCSI protocols to a variety of storage devices and implements the multi-RAID-level configuration and storage visualization functions. Moreover, the target emulator implements RAM caching, multi-queuing, and request merging to effectively improve the I/O response speed of the general storage devices. The throughput and average response times of the target emulator for block sizes of 4 KB to 128 KB are 150% faster for reads and 67% faster for writes than the existing emulator. With a block size of 16 KB, the I/O latency of the target emulator is only about 20% that of the existing emulator.

摘要：high-performance network processors are expected to play an important role in future high-speed routers. This paper focuses on two representative techniques needed for high-performance network processors: hardwired logic design and multithread design. Using hardwired logic, this paper compares a single-thread design with a multithread design, and proposes general models and principles to analyze the clock frequency and the resource cost for these environments. Then, two IP header processing schemes, one in single-thread mode and the other in double-thread mode, are developed using these principles and the implementation results verified the theoretical calculation.

摘要：Remodeled clay and sand rock specimens were prepared by designing lateral confinement and water drainage experiments based on the stress exerted on granular materials in a waste *** in situ test was conducted in an internal waste dump;the physical and mechanical parameters of the remodeled rock mass dumped at different time and depths were *** on statistics,regression analysis was performed with regard to the shearing stress parameters acquired from the two *** factors,such as remodeling pressure(burial depth),remodeling time(amount of time since waste was dumped),and the corresponding functional relationship,were *** indicates that the cohesion of the remodeled clay and its remodeling pressure are correlated by a quadratic function but are not correlated with remodeling time *** situ experimental results indicate that the shear strength of reshaped granular materials in the internal dump is positively correlated with burial depth but poorly correlated with time *** Cand burial depth H follow a quadratic function,specifically for a short time since waste has been *** revealed by both in situ and laboratory experiments,the remodeling strength of granular materials varies in a certain *** consistency of such materials verifies the reliability of the remodeling experimental program.

摘要：It is scientifically important science value and engineering promising to develop the buoyancy-lift integrated hybrid airship for high attitude *** the numerical method,a new tandem wings hybrid airship with both higher utility value and economy efficiency was obtained and its total performance and technical parameters were analyzed in *** order to further improve the lift-drag characteristics,we implemented the optimization design for aerodynamic configuration of tandem wings hybrid airship via the response surface *** results indicate that the tandem wings hybrid airship has considerable volume efficiency and higher aerodynamic *** optimization,the lift-drag ratio of this hybrid airship was increased by 6.08%.In a given gross lift condition,tandem wings hybrid airship may provide more payload and specific ***,the size of tandem airship is smaller so the demand for skin flexible materials can be *** of this study could serve as a new approach to designing buoyancy-lifting integrated hybrid airship.

摘要：A new technique of dimension reduction named projection pursuit is applied to model and evaluatewetland soil quality variations in the Sanjiang Plain, Helongjiang Province, china. By adopting the im-proved real-coded accelerating genetic algorithm (RAGA), the projection direction is optimized and multi-dimensional indexes are converted into low-dimensional space. Classification of wetland soils and evaluationof wetland soil quality variations are realized by pursuing optimum projection direction and projection func-tion value. Therefore, by adopting this new method, any possible human interference can be avoided andsound results can be achieved in researching quality changes and classification of wetland soils.

摘要：Most existing system-on-chip （SoC） architectures are for microprocessor-centric designs. They are not suitable for computing intensive SoCs, which have their own conflgurability, extendibility, perform- ance, and data exchange characteristics. This paper analyzes these characteristics and gives design princi- ples for computing intensive SoCs. Three architectures suitable for different situations are compared with selection criteria given. The architectural design of a high performance network security accelerator （HPNSA） is used to elaborate on the design techniques to fully exploit the performance potential of the ar- chitectures. A behavior-level simulation system is implemented with the C＋＋ programming language to evaluate the HPNSA performance and to obtain the optimum system design parameters. Simulations show that this architecture provides high performance data transfer.