摘要：The design method for a high-voltage SOI trench LDMOS for various trench permittivities, widths and depths is introduced. A universal method for efficient design is presented for the first time, taking the trade-off between breakdown voltage （BV） and specific on-resistance （Rs, on） into account. The high-k （relative permittivity） dielectric is suitable to fill a shallow and wide trench while the low-k dielectric is suitable to fill a deep and narrow trench. An SOI LDMOS with a vacuum trench in the drift region is also discussed. Simulation results show that the high FOM BV2/Rs, on can be achieved with a trench filled with the low-k dielectric due to its shortened cell-pitch.