摘要：The paper puts forward a method on controlling the AM-OLED panel to display image with high gray scale levels. It also gives an asic design sample to implement this method. A twenty sub-fields scan scheme has been taken into use in the chip to display 256 gray scale levels on a QVGA resolution AM-OLED display screen. The functions of image scaling and rotating have also been implemented for multiply application. The simulation and chip test result show that the chip design has met the design requirements.

摘要：Aim To design an asic based on CORDIC(coordinate rotations digital computer) to meet the requirement of coordinate conversion in high speed radar signal processing. Methods A new pipeline CORDIC architecture easily realized in VLSI was introduced. Results and Conclusion The results of hardware simulation with FPGA show that the pipeline CORDIC architecture meets the requirement.