摘要：A cmos folding and interpolating analog-to-digital converter (ADC) for embedded application is *** circuit is fully compatible with standard digital cmos technology.A modified folding block implemented without resistor contributes to a small chip *** the input stage,offset averaging reduces the input capacitance and the distributed track-and-hold circuits are proposed to improve signal-to-noise-plus-distortion *** 200Ms/s 8bit ADC with 177mW total power consumption at 3.3V power supply is realized in standard digital 0.18μm 3.3V cmos technology.