摘要：The Godson-2G microprocessor is a high performance SOC which integrates a four-issue 64-bit high performance CPU core （called GS464）, a DDR2/3 controller, a HyperTransport controller, a PCI/PCI-X controller, etc. It is physically implemented in 65 nm CMOS process and reaches the frequency of 1GHz with power consumption less than 4 W. The main challenges of Godson-2G physical implementation include nanometer process technology effects, high performance design targets, and tight schedule. This paper describes the key innovative features of physical design methodology which had been used in Godson-2G physical implementation, with particular emphasis on interconnect driven floorplan generation （ICD-FP）, adapted boundary constraints design optimization （ABC-OPT）, automatic register group clock tree generation methodology （ARG-CTS）.

摘要：The instruction fetch unit （IFU） usually dissipates a considerable portion of total chip power. In traditional IFU architectures, as soon as the fetch address is generated, it needs to be sent to the instruction cache and TLB arrays for instruction fetch. Since limited work can be done by the power-saving logic after the fetch address generation and before the instruction fetch, previous power-saving approaches usually suffer from the unnecessary restrictions from traditional IFU architectures. In this paper, we present CASA, a new power-aware IFU architecture, which effectively reduces the unnecessary restrictions on the power-saving approaches and provides sufficient time and information for the power-saving logic of both instruction cache and TLB. By analyzing, recording, and utilizing the key information of the dynamic instruction flow early in the front-end pipeline, CASA brings the opportunity to maximize the power efficiency and minimize the performance overhead. Compared to the baseline configuration, the leakage and dynamic power of instruction cache is reduced by 89.7% and 64.1% respectively, and the dynamic power of instruction TLB is reduced by 90.2%. Meanwhile the performance degradation in the worst case is only 0.63%. Compared to previous state-of-the-art power-saving approaches, the CASA-based approach saves IFU power more effectively, incurs less performance overhead and achieves better scalability. It is promising that CASA can stimulate further work on architectural solutions to power-efficient IFU designs.

摘要：This paper introduces a heterogeneous distributed database system called LSZ system, where LSZ is an abbreviation of Li Shizhen, an ancient Chinese medical scientist. LSZ system adopts cluster as distributed database node (or site). Each cluster consists of one or several microcomputers and one server. The paper describes its basic architecture and the prototype implementation, which includes query processing and optimization, transaction manager and data language translation. The system provides a uniform retrieve and update user interface through global relational data language GRDL.

摘要：There has been an increasing interest in integrating decision support systems (DSS) and expert systems (ES) to provide decision makers a more accessible, productive and domain-independent information and computing environment. This paper is aimed at designing a multiple expert systems integrated decision support system (MESIDSS) to enhance decision makers' ability in more complex cases. The basic framework, management system of multiple ESs, and functions of MESIDSS are presented. The applications of MESIDSS in large-scale decision making processes are discussed from the following aspects of problem decomposing, dynamic combination of multiple ESs, link of multiple bases and decision coordinating. Finally, a summary and some ideas for the future are presented.

摘要：The paper presents the conceptual and operational basis of the creation of IDSS based on our recent research experience. In this paper, an intelligent decision support system, IDSS is defined as: any interactive system that is specially designed to improve the decision making of its user by extending the user's cognitive decision making abilities. As a result, this view of man-machine joint cognitive system stresses the need to use computational technology to aid the user in the decision making process. And the human's role is to achieve total systems's objectives. The paper outlines the designing procedure in successive steps. First, the decision maker's cognitive needs for decision support are identified. Second, the computationally realizable support functions are defined that could be provided by IDSS. Then, the specific techniques that would best fill the decision needs are discussed. And finally, for system implementation the modern computational technology infrastructure is emphasized.

摘要：Single-chip multiprocessor (CMP) combined with the fault-loleranl(FT)techniques offers an ideal architecture to achieve high availability on the basis of sustaining highcomputing performance FT design of a single-chip multiprocessor is described, including thetechniques from hard-wart redundancy to software support and firmware strategy. The design aims atmasking the influences of errors and automatically correcting the system states.