摘要：芯片应用

摘要：A novel layout has been proposed to reduce the single event upset(SEU) vulnerability of SRAM *** 3-D technology computer-aided design(TCAD) simulation analyses show that the proposed layout can recover the upset-state much easier than conventional layout for larger space of pmos *** the angle incidence,the proposed layout is immune from ion hit in two plans,and is more robust against SEU in other two plans than the conventional *** ability of anti-SEU is enhanced by at least 33% while the area cost reduced by 47%.Consequently,the layout strategy proposed can gain both reliability and area cost benefit simultaneously.