摘要：Using Geant4 Monte Carlo code and Technology Computer-Aided Design(TCAD) simulation,energy deposition and charge collection of single event effects(SEE) are studied,which are induced by low-energy protons and α particles in small feature size *** analyzed charge collection of SEE especially at Bragg's peak and obtained two types of deposited energy distributions of protons and α particles at different incident *** two components of the total charge collected are quantified,which are due to drift current of the space charge region and current in the funnel region *** explain the high soft error rate in experiments of low energy proton.

摘要：Since single event transient pulse quenching can reduce the SET(single event transient) pulsewidths effectively,the charge collected by passive device should be maximized in order to minimize the propagated *** the perspective of the layout and circuit design,the SET pulsewidths can be greatly inhibited by minimizing the layout spacing and signal propagation delay,which sheds new light on the radiation-hardened ICs(integrated circuits) *** show that the SET pulsewidths of propagation are not in direct proportion to the LET(linear energy transfer) of incident particles,thus the defining of the LET threshold should be noted when SET/SEU(single event upset) occurs for the radiation-hardened *** capability of anti-radiation meets the demand when LET is high but some soft errors may occur when LET is ***,radiation experiments should be focused on evaluating the LET that demonstrates the worst response to the circuit.

摘要：Using Technology Computer-Aided Design(TCAD) 3-D simulation,the single event effect(SEE) of 25 nm raised source-drain FinFET is *** on the calibrated 3-D models by process simulation,it is found that the amount of charge collected increases linearly as the linear energy transfer(LET) increases for both n-type and p-type FinFET hits,but the single event transient(SET) pulse width is not linear with the incidence LET and the increasing rate will gradually reduce as the LET *** impacts of wafer thickness on the charge collection are also analyzed,and it is shown that a larger thickness can bring about stronger charge *** reducing the wafer thickness could mitigate the SET effect for FinFET technology.