摘要：Based on the equivalent circuit model of a two-port optical receiver front-end,the relationship between the equivalent input noise current spectral density and the noise figure is analyzed. The derived relationship has universal validity for determining the equivalent input noise current spectral density for optical receiver designs, as verified by measuring a 155Mb/s high-impedance optical receiver ***. Good agreement between calculated and simulated results has been achieved.

摘要：In this paper, a low-noise preamplifier for MRI is designed and studied. A noise matching network consisting of three elements is presented. To the single-stage AsGa-FET preamplifier working at 128 MHz, the measured gain through network analyzer (HP8712C) and noise figure through noise figure analyzer (8970B) are 25 and 0.43 dB, respectively.

摘要：This paper discusses the design of a fully differential 2.1 GHz CMOS low noise amplifier using the TSMC 0.25 μm CMOS process. Intended for use in 3G, the low noise amplifier is fully integrated and without off-chip components. The design uses an LC tank to replace a large inductor to achieve a smaller die area, and uses shielded pad capacitances to improve the noise performance. This paper also presents evaluation results of the design.

摘要：This paper presents the design and implementation of a fully integrated multi-band RF receiver frontend for GNSS applications on L-band.A single RF signal channel with a low-IF architecture is adopted for multi-band operation on the RF section,which mainly consists of a low noise amplifier（LNA）,a down-converter,polyphase filters and summing *** improved cascode source degenerated LNA with a multi-band shared off-chip matching network and band switches is implemented in the first amplifying ***,a re-designed wideband double balance mixer is implemented in the down conversion stage,which provides better gain,noise figure and linearity *** a TSMC 0.18μm 1P4M RF CMOS process,a compact 1.27 GHz/1.575 GHz dualband GNSS frontend is realized in the proposed low-IF *** measurements exhibit the gains of 45 dB and 43 dB,and noise figures are controlled at 3.35 dB and 3.9 dB of the two frequency bands,*** frontend model consumes about 11.8-13.5 mA current on a 1.8 V power *** core occupies 1.91×0.53 mm2 while the total die area with ESD is 2.45×2.36 mm^2.

摘要：A RF low noise amplifier,integrated in a single bluetooth transceiver chip and fabricated in 0.35μm digital CMOS technology,is *** the consideration of ESD protection and package,design methodology is discussed from the aspects of noise optimization,impedance match,and forward *** 2.05GHz,the measured S 11 is -6.4dB, S 21 is 11dB with 3dB-BW of 300MHz,and NF is about *** indicates that comprehensive consideration of parasitics,package model,and reasonable process is necessary for RF circuit design.

摘要：We present the design of a wide-band low-noise amplifier （LNA） implemented in 0.35μm SiGe BiCMOS technology for cable and terrestrial tuner applications. The LNA utilizes current injection to achieve high linearity. Without using inductors, the LNA achieves 0.1 ～ 1GHz wide bandwidth and 18. 8dB gain with less than 1.4dB of gain variation. The noise figure of the wideband LNA is 5dB, and its 1dB compression point is - 2dBm and IIP3 is 8dBm. The LNA dissipates 120mW of power with a 5V supply.

摘要：A low power 433 MHz CMOS （complementary metal- oxide-semiconductor transistor） low noise amplifier（LNA）, used for an ISM （ industrial-scientific-medical ） receiver, is implemented in a 0. 18 μm SMIC mixed-signal and RF （ radio frequency） CMOS process. The optimal noise performance of the CMOS LNA is achieved by adjusting the source degeneration inductance and by inserting an appropriate capacitance in parallel with the input transistor of the LNA. The measured results show that at 431 MHz the LNA has a noise figure of 2.4 dB. The S21 is equal to 16 dB, S11 = -11 dB, S22 = -9 dB, and the inverse isolation is 35 dB. The measured input 1-dB compression point （PtdB） and input third-order intermodulation product （IIP3）are - 13 dBm and -3 dBm, respectively. The chip area is 0. 55 mm × 1.2 mm and the DC power consumption is only 4 mW under a 1.8 V voltage supply.

摘要：This paper describes a CMOS low noise amplifier （LNA） plus the quadrature mixers intended for use in the front-end of portable global positioning system （GPS） receivers. The LNA makes use of an inductively degenerated input stage and power-constrained simultaneous noise and input matching techniques. The quadrature mixers are based on a Gil- bert cell type. The circuits are implemented in a TSMC 0.18μm RF CMOS process. Measurement results show that a voltage conversion gain of 35dB is achieved with a cascade noise and an input return loss of - 22.3dB. The fully differential figure of 2.4dB,an input ldB compression point of - 22dBm, circuits only draw 5.4mW from a 1.8V supply.