摘要：A Weighted Essentially Non-Oscillatory scheme(WENO) is a solution to hyperbolic conservation laws,suitable for solving high-density fluid interface instability with strong intermittency. These problems have a large and complex flow structure. To fully utilize the computing power of High Performance Computing(HPC) systems, it is necessary to develop specific methodologies to optimize the performance of applications based on the particular system’s architecture. The Sunway TaihuLight supercomputer is currently ranked as the fastest supercomputer in the world. This article presents a heterogeneous parallel algorithm design and performance optimization of a high-order WENO on Sunway TaihuLight. We analyzed characteristics of kernel functions, and proposed an appropriate heterogeneous parallel model. We also figured out the best division strategy for computing tasks,and implemented the parallel algorithm on Sunway TaihuLight. By using access optimization, data dependency elimination, and vectorization optimization, our parallel algorithm can achieve up to 172× speedup on one single node, and additional 58× speedup on 64 nodes, with nearly linear scalability.

摘要：Optimal design is one of the most important issues in robots. Since the very beginning, the concepts of the Jacobian matrix, manipulability and condition number, which are used successfully in the field of serial robots, have been applied to parallel robots. Unlike serial robots, parallel robots are good for motion/force transmission. Their performance evaluation and design should be correspondingly dif- ferent. This paper is an attempt to optimally design a novel spatial three-degree-of-freedom (3-DOF) parallel robot by using the concept of motion/force transmission. Accordingly, three indices are defined. The suggested indices are independent of any coordinate frame and could be applied to the analysis and design of a parallel robot whose singularities can be identified wholly by using the relative angle between the output and adjacent links, and by using the relative angle between the input and adjacent links.

摘要：A redundantly actuated parallel manipulator(RAPM)with mixed translational and rotational degrees of freedom(DOFs)is challenged for its dimensionally homogeneous Jacobian modeling and optimal design of *** this paper,a means to achieve redundant actuation by adding kinematic constraints is introduced,which reduces the DOFs of the end-effector(EE).A generic dimensionally homogeneous Jacobian is developed for this type of RAPMs,which maps the generalized velocities of three points on the EE to the joint velocities.A new optimization algorithm derived from this dimension-ally homogeneous Jacobian is proposed for the optimal design of this type of *** an example,this paper presents a spatial RAPM involving linkages and cam *** RAPM has 4 DOFs and 6 translational *** linkage lengths and the position of the universal joints of the RAPM are optimized based on the dimensionally homogeneous Jacobian.

摘要：异构众核架构具有超高的性能功耗比,已成为超级计算机体系结构的重要发展方向.但众核系统更为复杂的并行层次和存储层次,给编程和优化带来了极大的挑战.因此,研究面向众核系统的并行编程技术,对于降低国产众核系统并行应用的编程难度、提升并行程序的性能都具有重要的意义.提出统一架构的多模式并行编程模型,包括异构融合的加速运算模型和按同构方式编程的自主运算模型,根据编程模型设计了parallel C语言,能够有效地描述国产众核系统的异构并行性.与其他众核系统上MPI+X的使用模式相比,编程和系统优化都具有全局视角,在多级局部性描述、单边消息、兼容已有多核应用等方面具有特色;基于Open64构建了parallel C编译系统,全面支持加速运算模型和自主运算模型,提出并实现了数据布局与自动DMA、编译指导的线程代理和拓扑位置感知的集合通信等优化.Micro Benchmark和实际应用在神威太湖之光计算机系统上的测试数据结果表明:parallel C语言和编译系统具有良好的性能和可扩展性,能够有效支撑大型应用.

摘要：本文提出了一种直接数字频率合成器(DDFS)的设计,以parallel_CORDIC(COrdinate Rotation Digital Computer)算法模块替代传统的查找表方式,实现了相位与幅度的一一对应,输出相位完全正交的正余弦波形;同时应用旋转角度预测及4:2的进位保存加法器(CSA)技术,将速度比传统CORDIC算法提高41.7%,精度提高到10-4.最后以Xilinx的FPGA硬件实现整个设计.

摘要：Realizing digital signal demodulation on the general computer is an important research direction in the field of signal processing in recent years. In this paper, the algorithm of BPSK signal demodulation which has high real-time requirements is researched on the general computer. According to the characteristics of “CPU + GPU” heterogeneous computing, the parallel computation model of digital communication is put forward, and BPSK signal demodulation is realized on CUDA platform. Test results show that the computing time ratio of 1:1.7, when  the bit error rate can be achieved 10?5.

摘要：This paper discusses design and comparison of Simulated Annealing Algorithm and Greedy Randomized Adaptive Search Procedure (GRASP) to minimize the makespan in scheduling n single operation independent jobs on m unrelated parallel machines. This problem of minimizing the makespan in single machine scheduling problem with uniform parallel machines is NP hard. Hence, heuristic development for such problem is highly inevitable. In this paper, two different Meta-heuristics to minimize the makespan of the assumed problem are designed and they are compared in terms of their solutions. In the first phase, the simulated annealing algorithm is presented and then GRASP (Greedy Randomized Adaptive Search procedure) is presented to minimize the makespan in the single machine scheduling problem with unrelated parallel machines. It is found that the simulated annealing algorithm performs better than GRASP.

摘要：Emulating massively parallel computer architectures represents a very important tool for the parallel programmers. It allows them to implement and validate their algorithms. Due to the high cost of the massively parallel real machines, they remain unavailable and not popular in the parallel computing community. The goal of this paper is to present an elaborated emulator of a 2-D massively parallel re-configurable mesh computer of size n x n processing elements (PE). Basing on the object modeling method, we develop a hard kernel of a parallel virtual machine in which we translate all the physical properties of its different components. A parallel programming language and its compiler are also devel-oped to edit, compile and run programs. The developed emulator is a multi platform system. It can be installed in any sequential computer whatever may be its operating system and its processing unit technology (CPU). The size n x n of this virtual re-configurable mesh is not limited;it depends just on the performance of the sequential machine supporting the emulator.

摘要：大规模异构众核计算机系统具有计算能力强、性能功耗比高等突出优点,已成为超级计算机的发展方向,但其复杂的异构结构和庞大的系统规模,也使系统的可用性面临巨大挑战,因此研究面向大规模异构众核系统的轻量级容错技术具有重要意义。针对传统基于检查点的系统级容错开销过大的问题,在parallel C语言中设计并实现了故障局部感知的轻量级降级、编译指导与自动分析的检查点等语言支持的容错机制,兼顾了好用性和高效性。局部故障感知的轻量级降级结合动态任务调度框架实现,支持众核系统,可扩展到百万以上并行规模;编译指导与自动分析的检查点通过程序员插入简单的编译指示,由编译器进行分析,提示不需要保留的数据,可有效降低保留恢复的数据量。神威太湖之光超级计算机上的测试数据表明,两种容错措施相对于传统容错方法效果良好,轻量级降级的容错开销小于1%,相对于传统回卷容错方法单次故障执行时间可减少3.5%以上,编译指导与自动分析的检查点在典型应用中最多可将保留量降低至1/10,具有很好的实用性。

摘要：Traditional transformer in high-voltage power supplies has many disadvantages such as high turn’s ratio, large volume and great design difficulties. parallel resonant converters (PRCs) are widely used in high-voltage power supplies. A kind of high-voltage circuit topology can be formed by combining PRCs and voltage-doubler rectifier, which is called parallel resonant dual voltage converters (PRDVCs). In PRDVCs both voltage-doubler rectifier and transformer can boost voltage, which reduced turn’s ratio and volume of the transformer, making it easier to produce. Thus it not only realizes the high-voltage output, but also realizes the miniaturization of high-voltage power supply. Three modes of the converters were researched and simulated. Converting conditions of three modes were given. At last, PRDVCs was used to design a 5000V/50mA high-voltage power supply. The waveforms and results of the experiment were given, which validated the feasibility of the converters and its conversion efficiency might be improved to 93%.