摘要：采用TSMC 0.18μm RF CMOS工艺,设计了一种Nauta跨导的Gm_C复数带通滤波器调谐电路,可实现滤波器的频率和Q值同时调谐.该调谐电路的频率调谐环路使用数字鉴频器和改进结构的数模转换器,Q值调谐电路采用能够在高输出电压下准确镜像电流的电流镜,整个调谐电路具备有利于改善滤波器线性度的高调谐电压输出能力.测试结果表明,1.8 V电源电压下,调谐电路输出的调谐电压最高可达到1.71 V.调谐后滤波器的中心频率和带宽偏差降到小于3%.

摘要：介绍了TSMC 0.18μm CMOS工艺的功率放大器的设计,给出了仿真结果,版图照片和芯片键合测试方案。该电路采用三级差分放大结构,在其工作频段内满足绝对稳定条件,在3.3 V电源电压下,增益为27.3 dB,输入1 dB压缩点为-7 dBm,最大输出功率为19.3 dBm,输入端反射系数S11=-30 dB,可用于无线局域网802.11a标准的系统中。

摘要：A new switching circuit is presented for the application in the frequency range of 0 to 8 GHz. This switch is electro-thermally actuated and exhibits high radio frequency （RF） performance due to its lateral contact mechanism, It composes of electroplated nickel and silicon nitride as structural materials. The isolation between bias and signal ports is realized by using silicon nitride. In the case of a small deformation, the relation between the displacement of the vertex and the pre-bending angle is analyzed. The metal contact is realized by in-plane motion and sidewall connection. The switches were fabricated using the MetalMUMPs process from MEMSCAP. The RF testing results show that the switch has a low insertion loss of 0. 9 dB at 8 GHz and a high isolation of 30 dB below 8 GHz.

摘要：This paper discusses the design of a 10 Gb/s laser diode driver implemented in SiGe BiCMOS technology. The laser diode driver is composed of an input buffer, a predriver circuit and an output current switch stage. With the current mode logic （CML） structure, the input buffer and the predriver circuit have the capability of transmission and amplification of high speed data. By employing MOS-HBT cascode structure as the output stage, the laser diode driver exhibits very high speed and efficiency working at the 10 Gb/s data rate. The core circuit is operated under a 3. 3 V supply, while the output stage is operated under 5.5 V for sufficient headroom across the laser diode. The chip occupies a die area of 600 μm × 800μm. Measurements on chip show clear electrical eye diagrams over 10 Gb/s, which can well meet the specifications defined by SDH STM64/SONET OC192 and a 10 Gb/s Ethemet eye mask. Under a 5. 5 V supply voltage, the maximum output swing is 3.0 V with a 50 12 load （the corresponding modulation current is 60 mA）, and the total power dissipation is 660 mW.

摘要：为满足无线传感网射频收发芯片中频率综合器的应用需求,采用TSMC 0.18μm RF CMOS工艺设计并实现了一个4.8 GHz低功耗LC压控振荡器.电路核心采用电流源偏置的互补差分负阻LC振荡器结构以及3 bit开关电容阵列,输出采用共源级缓冲.给出了电路设计,对噪声抑制进行了分析,并在Cadence环境下完成了版图设计,版图面积为700μm×900μm.在电源电压为1.8V条件下进行了后仿真,并采用2组SSGSS及1组三针直流探针完成了流片验证和芯片测试.结果表明:电路的后仿真调谐范围大于25%,能够有效地补偿工艺角偏差;在载波频率为4.8 GHz处,后仿真相位噪声为-126.8 dBc/Hz@3 MHz.实际测试中,电路的调谐范围为24%,在应用要求的3 MHz频偏处,相位噪声达到-121.12 dBc/Hz,核心电路工作电流仅为2 mA.

摘要：Based on the 4-channel neural signal regeneration system which is realized by using discrete devices and successfully used for in-vivo experiments on rats and rabbits, a single channel neural signal regeneration integrated circuit （IC）is designed and realized in CSMC ＇ s 0. 6 μm CMOS （ complementary metal-oxide-semiconductor transistor ） technology. The IC consists of a neural signal detection circuit with an adjustable gain, a buffer, and a function electrical stimulation （FES） circuit. The neural signal regenerating IC occupies a die area of 1.42 mm × 1.34 mm. Under a dual supply voltage of ±2. 5 V, the DC power consumption is less than 10 mW. The on-wafer measurement results are as follows： the output resistor is 118 ml）, the 3 dB bandwidth is greater than 30 kHz, and the gain can be variable from 50 to 90 dB. The circuit is used for in-vivo experiments on the rat＇ s sciatic nerve as well as on the spinal cord with the cuff type electrode array and the twin-needle electrode. The neural signal is successfully regenerated both on a rat＇ s sciatic nerve bundle and on the spinal cord.

摘要：基于 0 .1 8μm CMOS工艺设计的 1 0 Gb/ s激光二极管驱动器电路。核心单元为两级直接耦合的差分放大器 ,电路中采用了并联峰化技术和放大级直接耦合技术以扩展带宽 ,降低功耗。模拟结果表明 ,在 1 .8V电源电压作用下该电路可工作在 1 0 Gb/ s速率上 ,输入单端峰峰值为 0 .3 V的差分信号时 ,在单端 5 0Ω负载上的输出电压摆幅可达到 1 .4V,电路功耗约为 85 m W。

摘要：The characteristic impedances of L-type and T-type networks are first investigated for a distributed amplifier *** analysis shows that the L-type network has better frequency characteristics than the T-type one.A distribution amplifier based on the L-type network is implemented with the 2-μm GaAs HBT（heterojunction-bipolar transistor） process of WIN *** measurement result presents excellent bandwidth performance and gives a gain of 5.5 dB with a gain flatness of ±1dB over a frequency range from 3 to 18 *** return losses S11 and S22 are below-10dB in the designed frequency *** output 1-dB compression point at 5 GHz is 13.3 *** chip area is 0.95 mm2 and the power dissipation is 95 mW under a 3.5 V supply.

摘要：设计了一种直接数字输出的DC-10 Mbit/s非均衡码突发信号光接收机,并采用0.5μmCMOS工艺成功实现.该接收机根据突发非均衡码的特点,以峰值检测为基础,采用全直流耦合,设计了新型开关自动增益控制电路和复位控制逻辑电路,实现了灵敏度和动态范围的优化.整个系统具有高响应速度,可消除突发导致的比特丢失.测试结果表明,当速率为10Mbit/s和600bit/s时,该接收机可分别获得优于-30dBm和-36dBm的灵敏度及宽于30dB的动态范围.对于连续"0"信号和无信号状态,该接收机提供可编程时间的报警指示功能.整个接收机采用5V单电源供电,功耗仅为30mW.

摘要：无线接收机小型化及低成本的发展趋势,要求人们解决高集成度及低功率的问题,从而推动了将射频部分与基带电路部分实现单版集成的研究,我们给出了利用0.18μm CMOS工艺设计的5.2GHz低嗓声放大器。在1.8V电压下,工作电流为24mA增益15.8dB噪声系数为1.4dB。