摘要：A storage system is the core of a computer,and plays an important role in the sustainable development of emerging strategic industries,such as artificial intelligence,big data,cloud computing,and the Internet of *** stack access is a major factor restricting the performance of data-intensive systems because of the increasing performance of processors and network devices.

摘要：Sweat could be a carrier of informative biomarkers for health status identification;therefore,wearable sweat sensors have attracted significant attention for *** external power source is an important component of wearable sensors,however,the current power supplies,i.e.,batteries,limit further shrinking down the size of these devices and thus limit their application areas and ***,we report a stretchable self-powered biosensor with epidermal electronic format that enables the in situ detec-tion of lactate and glucose concentration in *** biofuel cells serve as self-powered sensing modules allowing the sweat sensor to exhibit a determination coefficient(R2)of 0.98 with a sensitivity of 2.48 mV/mM for lactate detection,and R2 of 0.96 with a sensitivity of 0.11 mV/μM for glucose *** microfluidic channels developed in an ultra-thin soft flexible polydimethylsiloxane layer not only enable the effective collection of sweat,but also provide excellent mechanical properties with stable performance output even under 30%*** presented soft sweat sensors can be integrated at nearly any location of the body for the continuous monitoring of lactate and glucose changes during normal daily activities such as *** results provide a promising approach to develop next-generation sweat sensors for real-time and in situ sweat analysis.

摘要：System analysts often use software fault prediction models to identify fault-prone modules during the design phase of the software development life cycle. The models help predict faulty modules based on the software metrics that are input to the models. In this study, we consider 20 types of metrics to develop a model using an extreme learning machine associated with various kernel methods. We evaluate the effectiveness of the mode using a proposed framework based on the cost and efficiency in the testing phases. The evaluation process is carried out by considering case studies for 30 object-oriented software systems. Experimental results demonstrate that the application of a fault prediction model is suitable for projects with the percentage of faulty classes below a certain threshold, which depends on the efficiency of fault identification(low: 47.28%; median: 39.24%; high: 25.72%). We consider nine feature selection techniques to remove the irrelevant metrics and to select the best set of source code metrics for fault prediction.

摘要：Quantum-dot cellular automata (QCA) based on cryptography is a new paradigm in the field of nanotechnology. The overall performance of QCA is high compared to traditional complementary metal-oxide semiconductor (CMOS) technology. To achieve data security during nanocommunication, a cryptography-based application is proposed. The devised circuit encrypts the input data and passes it to an output channel through a nanorouter cum data path selector, where the data is decrypted back to its original form. The results along with theoretical implication prove the accuracy of the circuit. Power dissipation and circuit complexity of the circuit have been analyzed.

摘要：A multi-bit antifuse-type one-time programmable （OTP） memory is designed, which has a smaller area and a shorter programming time compared with the conventional single-bit antifuse-type OTP memory. While the conventional antifuse-type OTP memory can store a bit per cell, a proposed OTP memory can store two consecutive bits per cell through a data compression technique. The 1 kbit OTP memory designed with Magnachip 0.18 μm CMOS （complementary metal-oxide semiconductor） process is 34% smaller than the conventional single-bit antifuse-type OTP memory since the sizes of cell array and row decoder are reduced. And the programming time of the proposed OTP memory is nearly 50% smaller than that of the conventional counterpart since two consecutive bytes can be compressed and programmed into eight OTP cells at once. The layout area is 214 μm× 327 μ,, and the read current is simulated to be 30.4 μA.

摘要：The formal modelling and verification method has become an effective way of improving the reliability and correctness of complex,safety-critical embedded *** are widely used to formally model embedded applications,but they do not realise the reasonable separation of system concerns,which would result in code scattering and ***-Oriented Software Development(AOSD)technology could separate crosscutting concerns from core concerns and identify potential problems in the early phase of the software development life ***,the paper proposes aspect-oriented timed statecharts(extended timed statecharts with AOSD)to separately model base functional requirements and other requirements(e.g.,scheduling,error handling),thereby improving the modularity and development efficiency of embedded ***,the dynamic behaviours of embedded systems are simulated and analysed to determine whether the model satisfies certain properties(e.g.,liveness,safety)described by computation tree logic ***,a given case demonstrates some desired properties processed with respect to the aspect-oriented timed statecharts model.

摘要：In the field ofnanotechnology, quantum dot-cellular automata （QCA） is the promising archetype that can provide an alternative solution to conventional complementary metal oxide semiconductor （~MOS） circuit. QCA has high device density, high operating speed, and extremely low powex consumption. Reversible logic has widespread applications in QCA. Researchers have explored several designs of QCA-based reversible logic circuits, but still not much work has been reported on QCA-based reversible binary subtractors. The low power dissipation and high circuit density of QCA pledge the energy-efficient design of logic circuit at a nano-scale level. However, the necessity of too many logic gates and detrimental garbage outputs may limit the functionality of a QCA-based logic circuit. In this paper we describe the design and implementation of a DG gate in QCA. The universal nature of the DG gate has been established. The QCA building block of the DG gate is used to achieve new reversible binary subtractors. The proposed reversible subtractors have low quantum cost and garbage outputs compared to the existing reversible subtractors. The proposed circuits are designed and simulated using QCA Designer-2.0.3.

摘要：Global illumination is the core part of photo-realistic rendering. The photon mapping algorithm is an effective method for computing global illumination with its obvious advantage of caustic and color bleeding rendering. It is an active research field that has been developed over the past two decades. The deficiency of precise details and efficient rendering are still the main challenges of photon mapping. This report reviews recent work and classifies it into a set of categories including radiance estimation, photon relaxation, photon tracing, progressive photon mapping, and parallel methods. The goals of our report are giving readers an overall introduction to photon mapping and motivating further research to address the limitations of existing methods.

摘要：A novel adaptive dual network design consisting of a rough adjustment network(RAN)and a fine adjustment network (FAN)is proposed to eliminate the unknown time-variant uncertainties of servo system. To accomplish this objective,a RAN is proposed based on the combination of sliding mode control, function approximation, and error compensation technique. Then,an FAN is proposed to compensate the tracking error. In our current design, the FAN includes a critic network based on a neural network model and a prediction network based on an online curve fitting scheme. Theoretical analysis followed by detailed design strategies are presented in this work. Simulation results and comparative study of this method with those of existing approaches demonstrate the effectiveness of the proposed adaptive dual network design for position tracking

摘要：Quantum-dot cellular automata （QCA） is an emerging area of research in reversible computing. It can be used to design nanoscale circuits. In nanocommunication, the detection and correction of errors in a received message is a major factor. Besides, device density and power dissipation are the key issues in the nanocommunication architecture. For the first time, QCA-based designs of the reversible low-power odd parity generator and odd parity checker using the Feynman gate have been achieved in this study. Using the proposed parity generator and parity checker circuit, a nanocommunication architecture is pro- posed. The detection of errors in the received message during transmission is also explored. The proposed QCA Feynman gate outshines the existing ones in terms of area, cell count, and delay. The quantum costs of the proposed conventional reversible circuits and their QCA layouts are calculated and compared, which establishes that the proposed QCA circuits have very low quantum cost compared to conventional designs. The energy dissipation by the layouts is estimated, which ensures the possibility ofQCA nano-device serving as an alternative platform for the implementation of reversible circuits. The stability of the proposed circuits under thermal randomness is analyzed, showing the operational efficiency of the circuits. The simulation results of the proposed design are tested with theoretical values, showing the accuracy of the circuits. The proposed circuits can be used to design more complex low-power nanoscale lossless cation architecture such as nano-transmitters and nano-receivers