摘要：A novel 10 GHz eight-phase voltage-controlled oscillator （VCO） architecture applied in clock and data recovery （CDR） circuit for 40 Gbit/s optical communications system is proposed. Compared with the traditional eight-phase oscillator, a new ring CL ladder filter structure with four inductors is proposed. The VCO is designed and fabricated in IBM 90 nm complementary metal-oxide-semiconductor transistor （CMOS） technology. Measurement results show the tuning range is 9.2 GHz-11.0 GHz and the phase noise of - 108.85 dBc/Hz at 1 MHz offset from the carrier frequency of 10 GHz. The chip area of VCO is 500 μm × 685 μm and the power dissipation is 17.4 mW with the 1.2 V supply voltage.