摘要：A new architecture of digital processors for passive UHF radio-frequency identification tags is proposed. This architecture is based on ISO/IEC 18000-6C and targeted at ultra-low power consumption. By applying methods like system-level power management, global clock gating and low voltage implementation, the total power of the design is reduced to a few microwatts. In addition, an innovative way for the design of a true RNG is presented, which contributes to both low power and secure data transaction. The digital processor is verified by an integrated FPGA platform and implemented by the Synopsys design kit for ASIC flows. The design fits different CMOS technologies and has been taped out using the 2P4M 0.35 μm process of Chartered semiconductor.

摘要：The number of the dummy via can significantly affect the interconnect average *** paper explores the modeling of the interconnect average temperature in the presence of multiple dummy *** proposed model incorporates the multi-via effect into the effective thermal conductivity of the interlayer dielectric (ILD) to obtain accurate *** different ILDs,the multi-via effect is analyzed and ***,the extended applications of the multi-via effect are presented in this paper to obtain the minimum interconnect average temperature increase with a given via separation or *** study suggests that the multi-via effect should be accounted for in integrated circuits design to optimize the performance and design accuracy of integrated circuits.

摘要：Simulations are carried out to explore the possibility of achieving high breakdown voltage of Gain HEMT （high-electron mobility transistor）. GaN cap layers with gradual increase in the doping concentration from 2 x 10^16 to 5 x 10^19 cm-3 of N-type and P-type cap are investigated, respectively. Simulation results show that HEMT with P-doped GaN cap layer shows more potential to achieve higher breakdown voltage than N-doped GaN cap layer under the same doping concentration. This is because the ionized net negative space charges in P-GaN cap layer could modulate the surface electric field which makes more contribution to RESURF effect. Furthermore, a novel GaN/A1GaN/GaN HEMT with P-doped GaN buried layer in GaN buffer between gate and drain electrode is proposed. It shows enhanced performance. The breakdown voltage of the proposed structure is 640 V which is increased by 12% in comparison to UID （un-intentionally doped） GaN/A1GaN/GaN HEMT. We calculated and analyzed the distribution of electrons＇ density. It is found that the depleted region is wider and electric field maximum value is induced at the left edge of buried layer. So the novel structure with P-doped GaN buried layer embedded in GaN buffer has the better improving characteristics of the power devices.