摘要：A 4H-SiC MOSFET with breakdown voltage higher than 3300 V has been successfully designed and fabricated. Numerical simulations have been performed to optimize the parameters of the drift layer and DMOSFET cell structure of active area. The n-type epilayer is 33μm thick with a doping of 2.5 × 10^15 cm-3. The devices were fabricated with a floating guard ring edge termination. The drain current 1d= 5 A at Vg = 20 V, corresponding to vd = 2.5 v.

摘要：Ku-band GaN power transistor with output power over 100 W under the pulsed operation mode is pre- sented. A high temperature A1N nucleation together with an Fe doped GaN buffer was introduced for the developed GaN HEMT. The A1GaN/GaN hetero-structure deposited on 3 inch SiC substrate exhibited a 2DEG hall mobility and density of -2100 cm2/（V.s） and 1.0 x 10^13 cm-2, respectively, at room temperature. Dual field plates were introduced to the designed 0.25μm GaN HEMT and the source connected field plate was optimized for minimizing the peak field plate near the drain side of the gate, while maintaining excellent power gain performance for Ku-band application. The load-pull measurement at 14 GHz showed a power density of 5.2 W/mm for the fabricated 400 μm gate periphery GaN HEMT operated at a drain bias of 28 V. A Ku-band internally matched GaN power transistor was developed with two 10.8 mm gate periphery GaN HEMT chips combined. The GaN power transistor exhibited an output power of 102 W at 13.3 GHz and 32 V operating voltage under pulsed operation mode with a pulse width of 100 μs and duty cycle of 10%. The associated power gain and power added efficiency were 9.2 dB and 48%, respectively. To the best of the authors＇ knowledge, the PAE is the highest for Ku-band GaN power transistor with over 100 W output power.

摘要：A Y-band frequency doubler is analyzed and designed with GaAs planar Schottky diode, which is flip-chip solded into a 50 μm thick quartz substrate. Diode embedding impedance is found by full- wave analysis with lumped port to model the nonlinear junction for impedance matching without the need of diode equivalent circuit model. All the matching circuit is designed ＂on-chip＂ and the mul- tiplier is self-biasing. To the doubler, a conversion efficiency of 6.1% and output power of 5.4mW are measured at 214GHz with input power of 88mW, and the typical measured efficiency is 4.5% in 200 - 225 GHz.