摘要：Reactive distillation and dividing wall column distillation are two kinds of effective separation technologies,and their integrated configuration,reactive dividing wall column(RDWC),presents attractive *** this study,the rigorous simulation of RDWC for methyl acetate hydrolysis is performed,and sensitivity analysis is conducted to obtain the minimum reboiler *** a comparison is made between the conventional process and RDWC process,and it shows that 20.1% energy savings can be achieved by RDWC *** addition,the dynamic characteristic of RDWC is studied and an effective control strategy is *** simple PI control scheme with three temperature loops can obtain reasonable control performance and maintain products at desired *** is proved that this RDWC process is an energy efficiency alternative with good controllability.

摘要：A novel digital implementation of speed controller for a Permanent Magnet Synchronous Motor (PMSM) with disturbance rejection using conventional observer combined with Extended Kalman Filter (EKF) is proposed. First, the EKF is constructed to achieve a precise estimation of the speed and current from the noisy measurement. Second, a proportional integral derivative (PID) controller is developed based on Linear Quadratic Regulator (LQR) to achieve speed command tracking performance. Then, an observer is designed and its error is utilized to provide load disturbance compensation. The proposed method greatly enhances the PMSM performance by reducing the control signal variation as well as the disturbance. The speed control performance is significantly improved compared to the case when we have an observer acting alone. The simulation results for the speed response and variation of the states when the PMSM is subjected to the load disturbance are presented. The results verify the effectiveness of the proposed method.

摘要：This paper presents the design and implementation of a low-pass, high-pass and a hand-pass Finite Impulse Response (FIR) Filter using SPARTAN-6 Field Programmable Gate Array (FPGA) device. The filter performance is tested using Filter Design and Analysis (FDA) and FIR tools from Mathworks. The FDA Tool is used to define the filter order and coefficients, and the FIR tool is used for Simulink simulation. The FPGA implementation is carried out using Spartan-6 LX75T-3FGG676C for different filter specifications and simulated with the help of Xilinx ISE (Integrated Software Environment). System Generator ISE design suit 14.6i is used in synthesizing and co-simulation for FPGA filter output verification. Finally, comparison is done between the results obtained from the software simulations and those from FPGA using hardware co-simulation. The simulation waveforms and synthesis reports verify the parallel implementation of FPGA which proves its effectiveness in terms of speed, resource usage and power consumption.

摘要：This paper describes an approximated-scalar-sign-function-based anti-windup digital control design for analog nonlinear systems subject to input constraints. As input saturation occurs, the non-smooth saturation constraint is modeled with the approximated scalar sign function which is a smooth nonlinear function. The resulting nonlinear model is further linearized at any operating point with the optimal linearization technique, and Linear Quadratic Regulator (LQR) is then applied for a state-feedback controller optimal for each operating point. As input saturation is encountered, an iterative procedure is developed to adjust control gains by systematically updating LQR weighting matrices until the inputs lie within the saturation limits. Through global digital redesign, the analog LQR controller is converted to an equivalent digital one for keeping the essential control performance, and moreover, delay compensation is taken into account during digital redesign for compensating the potential time delays in a control loop. The swing-up and stabilization control of single rotary inverted pendulum system is used to illustrate and verify the proposed method.

摘要：This paper presents the design and implementation of a Stepper Motor using Nexys2 circuit board based on a Xilinx Spartan 3E Field Programmable Gate Array (FPGA) device with VHDL code. The algorithm implemented on FPGA allows a substantial decrease of the equivalent processing time developed by different velocity controllers. The Stepper Speed control is achieved using VHDL code, and the hardware digital circuit is designed for a programmable rotational stepper motor using VHDL as a tool and FPGA as a target technology. The 50 MHZ provided by the starter kit is divided to obtain the necessary delay time between the motor phases that ranges between 2 - 10 m seconds. Though output selections, the direction of rotation of the stepper motor besides the magnitude of the angle of movement and the rotation speed can be controlled. The major advantage of using reconfigurable hardware (FPGA) in implementing the Stepper Motor instead of a discrete digital component is that it makes modifications to the design easy and quick and also, the total design hence represents an embedded system (works without computer). The total programmable hardware design that controlled on the stepper motor movement, occupied an area that did not exceed 12% of the chip resources.

摘要：采用文献(魏洪川,喻文健,杨柳,等.基于K参数思想的快速三维互连电感电阻提取算法.电子学报,2005,33(8):1365-1369)中提出的算法选取窗口,证明基于此方法提取的部分磁阻矩阵K正定,进而证明基于该矩阵的模拟稳定.

摘要：在模拟退火算法中引入了准梯度的概念,改进了以模拟退火算法为基础的光刻掩模版优化算法.该算法优先搜索由准梯度确定的关键区域,减少了模拟退火算法的无效搜索次数,在保证优化效果的基础上,可以提高原算法的收敛效率.实验结果表明,在65nm CMOS工艺节点下,该算法使得收敛速度大幅提高,优化效果更好.

摘要：讨论了静态时序分析算法及其在IC设计中的应用。首先,文章讨论了静态时序分析中的伪路径问题以及路径敏化算法,分析了影响逻辑门和互连线延时的因素。最后通过一个完整的IC设计流程介绍了静态时序分析的应用。

摘要：2015年,AAM建筑工作室开始接洽剑桥大学艺术和人文主校区西奇维克区的总体规划事宜。该项目委托始于2000年,许多当时规划的主题仍然切题,但新的机遇也已出现,且在可持续性和出行等问题上需要考虑到环境和用户的需求。

摘要：二十世纪的地标建筑面临着更加强烈的改造或升级需求。如今,其建筑亮点越来越得到人们的欣赏。1974年,皇家节日音乐厅成为战后首个被列为I级保护文物的建筑(英国最高保护等级),表明其作为战后遗产的象征,具有极为重要的意义。但是,随着时间的流逝,音乐厅的会场声学开始失效,其门厅外观不断颓败,并且与河滨环境之间缺乏协调。我们对于建筑初始设计理念的理解,是解读此类设计理念、使其与现代和未来需求相应的关键。AAM建筑工作室曾领导了一项由彩票基金资助的大规模修复项目,该项目于2007年竣工。